PCI Express is the third generation of PCI (Peripheral Component Interconnect) technology that is used to connect IO peripheral devices in computer systems. PCI Express provides higher performance, enhanced capability and at a lower cost than its predecessors, PCI and PCI-X. PCI Express achieves these advantages by utilizing fairly recent advances in high-speed point-to-point interconnects, while maintaining a significant level of backwards compatibility to BIOS and Device Driver software. It is expected that PCI Express will quickly replace the popular and ubiquitous PCI bus and, in some cases, may supplant PCI-X in the server and high-end platforms. The performance improvements brought about by PCI Express provides ample headroom for the increasing demands of software applications. PCI Express systems are constructed of high-speed (2.5gigabits/sec) point-to-point connections that can transfer data in both directions simultaneously (dual simplex). These connections can be implemented in a variety of widths to meet the specific demands of the devices attached. The CPU and Memory are connected to the Root Complex that provides the ports through which PCI Express devices access main memory. Switches are used to extend the PCI Express fabric by providing additional connection ports as needed. Advanced error handling, virtual channel support, enhanced power management, and flow control are just a few of the new features added to PCI Express that provide improved performance, reliability, and extended capability.
PCI Express System Architecture provides an in-depth description of this technology and provides insights into its new features and implementation requirements. This comprehensive book describes the PCI Express technology using an approach that is as easy to read and reference.
The book is organized so that all relevant issues related to key topics can be found in a single location. For example, the various classes of errors and their causes are included in a signal location for easy reference, rather than being cross-referenced to many locations throughout the book. This book also contains over 450 illustrations that make difficult concepts much easier to grasp. You will find specific information needed for design, verification, and test, as well as background information essential for writing low-level BIOS and device drivers. Topics include:
Split transaction protocol
Packet format and definition, including the use of each field
Traffic Class and Virtual Channel applications and use
Flow Control initialization and operation
Error checking mechanisms and reporting options
Switch design issues
Advanced Power Management mechanisms and use
Active State Link Power Management
Hot Plug design and operation
Physical Layer functions
Electrical signaling characteristics and issues
PCI Express enumeration procedures
Configuration register definitions
MindShare's PC System Architecture Series is a crisply written and comprehensive set of guides to the most important PC hardware standards. Books in the series are intended for use by hardware and software designers, programmers, and support personnel. Each title explains the architecture, features, and operations of systems built using one particular type of chip or hardware specification.
About the Authors
MindShare, Inc. (mindshare), is one of the leading technical training companies in the hardware/software industry, providing innovative courses for hundreds of companies including IBM, HP/Compaq, AMD, and Dell.
Tom Shanley, president of MindShare, Inc., is one of the world's foremost authorities on computer system architecture. In the course of his career, he has trained thousands of engineers in hardware and software design.
Don Anderson is the author of many MindShare books. He passes on his wealth of experience in digital electronics and computer design by training engineers, programmers, and technicians for MindShare.