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Most popular at the top
- Springer US 2007; US$ 199.00
Modern circuits may contain up to several hundred million transistors. In the meantime it has been observed that verification becomes the major bottleneck in design flows, i.e. up to 80% of the overall design costs are due to verification. This is one of the reasons why several methods have been proposed as alternatives to classical simulation. Simulation... more...
- Springer Netherlands 2008; US$ 149.00
The size of technically producible integrated circuits increases continuously. But the ability to design and verify these circuits does not keep up with this development. Therefore, today?s design ?ow has to be improved to achieve a higher productivity. In this book the current design methodology and ver- cation methodology are analyzed, a number of... more...
- Springer Netherlands 2009; US$ 149.00
Faced with the steadily increasing complexity and rapidly shortening time-to-market requirements designing electronic systems is a very challenging task. To manage this situation effectively the level of abstraction in modeling has been raised during the past years in the computer aided design community. Meanwhile, for the so-called system-level design... more...
- Springer Netherlands 2010; Not Available
Debugging is the bottleneck to chip design productivity. This state-of-the-art book reviews modeling and verification of ESL designs. It is believed to be the first book that considers debugging for ESL designs. There is particular focus on SystemC. more...
- Springer Netherlands 2010; US$ 149.00
This book presents contributions to a design flow for reversible logic, including advanced methods for synthesis, optimization, verification, and debugging. It proposes several techniques for synthesis of very large functions in reversible logic. more...
- Springer New York 2012; Not Available
This book provides an overview of automatic test pattern generation (ATPG) and introduces novel techniques to complement classical ATPG, based on Boolean Satisfiability (SAT). It presents a fast and highly fault efficient SAT-based ATPG framework. more...
- Springer International Publishing 2014; US$ 99.00
This book introduces a new level of abstraction that closes the gap between the textual specification of embedded systems and the executable model at the Electronic System Level (ESL). Readers will be enabled to operate at this new, Formal Specification Level (FSL), using models which not only allow significant verification tasks in this early stage... more...
- Springer Fachmedien Wiesbaden 2015; US$ 59.99
This book presents the lecture notes of the 1st Summer School on Methods and Tools for the Design of Digital Systems, 2015, held in Bremen, Germany. The topic of the summer school was devoted to modeling and verification of cyber-physical systems. This covers several aspects of the field, including hybrid systems and model checking, as well as applications... more...
- Springer US 2005; Not Available
VLSI CADhas greatly bene?ted from the use of reduced ordered Binary Decision Diagrams (BDDs) and the clausal representation as a problem of Boolean Satis?ability (SAT), e.g. in logic synthesis, ver- cation or design-for-testability. In recent practical applications, BDDs are optimized with respect to new objective functions for design space exploration.... more...
- Springer Netherlands 2009; Not Available
Providing an introduction to ATPG, this book reviews the basic concept and classical ATPG algorithms. It is the first book to give a detailed overview on SAT-based ATPG. It describes the state-of-the-art in the field and shows directions for future work. more...