The Leading eBooks Store Online 4,272,009 members ⚫ 1,419,367 ebooks

New to eBooks.com?

Learn more

ASIC and FPGA Verification

A Guide to Component Modeling

ASIC and FPGA Verification by Richard Munden
Buy this eBook
US$ 70.95
(If any tax is payable it will be calculated and shown at checkout.)
Richard Munden demonstrates how to create and use simulation models for verifying ASIC and FPGA designs and board-level designs that use off-the-shelf digital components. Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today’s digital designs.

ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs.

*Provides numerous models and a clearly defined methodology for performing board-level simulation.
*Covers the details of modeling for verification of both logic and timing.
*First book to collect and teach techniques for using VHDL to model "off-the-shelf" or "IP" digital components for use in FPGA and board-level design verification.
Elsevier Science; October 2004
337 pages; ISBN 9780080475929
Read online, or download in secure PDF format
Title: ASIC and FPGA Verification
Author: Richard Munden
 
ISBNs
0080475922
9780080475929
9780125105811