The Leading eBooks Store Online 4,226,104 members ⚫ 1,419,518 ebooks

New to eBooks.com?

Learn more

Analysis and Design of Networks-on-Chip Under High Process Variation

Analysis and Design of Networks-on-Chip Under High Process Variation by Rabab Ezz-Eldin
Buy this eBook
US$ 139.00
(If any tax is payable it will be calculated and shown at checkout.)

This book describes in detail the impact of process variations on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconnect, in order to evaluate the delay and throughput variation with different NoC topologies. The authors describe an asynchronous router, as a robust design to mitigate the impact of process variation in NoCs and the performance of different routing algorithms is determined with/without process variation for various traffic patterns. Additionally, a novel Process variation Delay and Congestion aware Routing algorithm (PDCR) is described for asynchronous NoC design, which outperforms different adaptive routing algorithms in the average delay and saturation throughput for various traffic patterns.


Springer International Publishing; December 2015
156 pages; ISBN 9783319257662
Read online, or download in secure PDF format
Title: Analysis and Design of Networks-on-Chip Under High Process Variation
Author: Rabab Ezz-Eldin; Magdy Ali El-Moursy; Hesham F. A. Hamed
 
  • News
  • Contents
No entry found