The Leading eBooks Store Online 4,272,009 members ⚫ 1,419,367 ebooks

New to

Learn more

Leakage in Nanometer CMOS Technologies

Leakage in Nanometer CMOS Technologies by Siva G. Narendra
Buy this eBook
US$ 189.00
(If any tax is payable it will be calculated and shown at checkout.)
Scaling transistors into the nanometer regime has resulted in a dramatic increase in MOS leakage (i.e., off-state) current. Threshold voltages of transistors have scaled to maintain performance at reduced power supply voltages. Leakage current has become a major portion of the total power consumption, and in many scaled technologies leakage contributes 30-50% of the overall power consumption under nominal operating conditions. Leakage is important in a variety of different contexts. For example, in desktop applications, active leakage power (i.e., leakage power when the processor is computing) is becoming significant compared to switching power. In battery operated systems, standby leakage (i.e., leakage when the processor clock is turned off) dominates as energy is drawn over long idle periods. Increased transistor leakages not only impact the overall power consumed by a CMOS system, but also reduce the margins available for design due to the strong relationship between process variation and leakage power. It is essential for circuit and system designers to understand the components of leakage, sensitivity of leakage to different design parameters, and leakage mitigation techniques in nanometer technologies. This book provides an in-depth treatment of these issues for researchers and product designers.
Springer US; March 2006
317 pages; ISBN 9780387281339
Read online, or download in secure PDF format
Title: Leakage in Nanometer CMOS Technologies
Author: Siva G. Narendra; Anantha P. Chandrakasan
  • News
  • Contents
No entry found